/*******************************************************************************
* Project: QSAR(Cute Software Architecture) 
*
* Copyright: Copyright(C) 2024 by YuetingBen, All Rights Reserved
*
* File name: NvmCfg.c
*
* Brief: ;
*
* Author: Yueting.Ben
*
* Module: Nvm
*
*******************************************************************************/

/** HEADER FILES **/
#include "NvmCfg.h"


/** MACRO DEFINITION **/


/** TYPEDEF DEFINITION **/


/** LOCAL DATA DECLARATION **/


/** LOCAL DATA **/
const NvMBlockDescriptorType NvMBlockDescriptorTable[NvmConf_Block_Max] = 
{
    /* DtcDataBlock0 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0000u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_0]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock1 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0010u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_1]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock2 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0020u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_2]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock3 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0030u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_3]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock4 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0040u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_4]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock5 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0050u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_5]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock6 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0060u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_6]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock7 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0070u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_7]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock8 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0080u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_8]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* DtcDataBlock9 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x0090u, /* NvMNvBlockBaseNumber */
        16u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        (NvMRamBlockDataAddressType)(&Dem_DtcNvmData[DemConf_NvmBlockId_9]), /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* Did VIN */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x00A0u, /* NvMNvBlockBaseNumber */
        17u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        NULL_PTR, /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    },
    /* TestBlock1 */
    {
        NVM_CRC8, /* NvMBlockCrcType */
        0u, /* NvMBlockJobPriority */
        VM_BLOCK_NATIVE, /* NvMBlockManagementType */
        RESET, /* NvMBlockUseCrc */
        0x00C0u, /* NvMNvBlockBaseNumber */
        5u, /* NvMNvBlockLength */
        1u, /* NvMNvBlockNum */
        0u, /* NvMNvramDeviceId */
        NULL_PTR, /* NvMRamBlockDataAddress */
        NULL_PTR, /* NvMRomBlockDataAddress */
        0u, /* NvMRomBlockNum */
        SET, /* NvMSelectBlockForReadAll */
        RESET /* NvMSelectBlockForWriteAll */
    }, 
};

const NvM_ConfigType NvMConfig = 
{
    0x00
};